20260228对草稿的说明：芯营草稿系列，是在CSDN平台上未发表的草稿，本次按照时间顺序发出来，草稿的时间标记在标题中。既是对草稿箱的清理，也是对过往探索过程的一次回顾和备忘。本篇草稿收录的是两篇近期的有关开源EDA的arXiv论文，一篇是2403.07257v2-The Dawn of AI-Native EDA，另一篇是2308.01857v1-iEDA An Open-source Intelligent Physical Implementation Toolkit and Library。

【摘要】本文

----《2403.07257v2-The Dawn of AI-Native EDA》

Within the Electronic Design Automation (EDA) domain, AI-driven solutions have emerged as formidable tools, yet they typically augment rather than redefine existing methodologies. These solutions often repurpose deep learning models from other domains, such as vision, text, and graph analytics, applying them to circuit design without tailoring to the unique complexities of electronic circuits. Such an AI4EDA approach falls short of achieving a holistic design synthesis and understanding, overlooking the intricate interplay of electrical, logical, and physical facets of circuit data. This paper argues for a paradigm shift from AI4EDA towards AI-native EDA, integrating AI at the core of the design process. Pivotal to this vision is the development of a multimodal circuit representation learning technique, poised to provide a comprehensive understanding by harmonizing and extracting insights from varied data sources, such as functional specifications, RTL designs, circuit netlists, and physical layouts. We champion the creation of large circuit models (LCMs) that are inherently multimodal, crafted to decode and express the rich semantics and structures of circuit data, thus fostering more resilient, efficient, and inventive design methodologies. Embracing this AI-native philosophy, we foresee a trajectory that transcends the current innovation plateau in EDA, igniting a profound shift-left in electronic design methodology. The envisioned advancements herald not just an evolution of existing EDA tools but a revolution, giving rise to novel instruments of design tools that promise to radically enhance design productivity and inaugurate a new epoch where the optimization of circuit performance, power, and area (PPA) is achieved not incrementally, but through leaps that redefine the benchmarks of electronic systems' capabilities.

----《2308.01857v1-iEDA An Open-source Intelligent Physical Implementation Toolkit and Library》

Abstract: Open-source EDA shows promising potential in
unleashing EDA innovation and lowering the cost of chip design.
This paper presents an open-source EDA project, iEDA, aiming
for building a basic infrastructure for EDA technology evolution
and closing the industrial-academic gap in the EDA area. iEDA
now covers the whole flow of physical design (including Floorplan,
Placement, CTS, Routing, Timing Optimization etc.), and part of
the analysis tools (Static Timing Analysis and Power Analysis).
To demonstrate the effectiveness of iEDA, we implement and tape
out three chips of different scales (from 700k to 1.5M gates) on
different process nodes (110nm and 28nm) with iEDA. iEDA is
publicly available from the project home page http://ieda.oscc.cc.