0、参考资料。

https://www.electronicdesign.com/technologies/industrial/boards/article/21772104/from-cad-to-cae-to-eda-design-tools-have-wrestled-with-complexity

https://www.eetimes.com/how-it-was-cad-cae-and-eda/

https://www.synopsys.com/glossary/what-is-electronic-design-automation.html

这里对第一篇进行分析和评论。

1、从CAD到CAE和EDA。

From CAD To CAE To EDA, Design Tools Have Wrestled With Complexity
David Maliniak, June 10 2002, 12 min read

Since its beginnings in the early 1970s, the design automation industry has climbed up the complexity scale in the semiconductor world. The design process has seen a steady progression in its automation along the way, with each step overcoming some design issue while also spawning even greater complexity and new challenges. Business models have come and gone, expansions and contractions have taken place, and the EDA industry now faces another series in the great sea of changes.

Among the key drivers that have pushed evolution in design tools, complexity is most critical. In 1965, Gordon Moore predicted that over the following 10 years, the number of transistors per integrated circuit would double every 18 months.

A parade of microlithographic innovations has made today's vastly complex ICs possible in the physical realm. But without the design automation methodologies that have been shaped since Fairchild, Motorola, and Texas Instruments (TI) employed legions of draftsmen to produce layouts for TTL building blocks, today's SoC designers would be out of luck.

//一系列微光刻技术的创新使得当今物理领域中复杂程度极高的集成电路（IC）成为可能。但若没有自仙童半导体（Fairchild）、摩托罗拉（Motorola）和德州仪器（TI）雇用大批绘图员制作TTL电路模块的布局图所形成的设计自动化方法，如今的SoC（系统级芯片）设计者们恐怕就没有那么幸运了。

Multiple factors have shaped the path of design automation and the ways that it and the design process have influenced each other. Process technology was the most important, followed closely by the availability of increasingly powerful computing resources. Closely coupled to the latter was the dispersal of those resources from mainframes to the engineer's desktop.

Consider how design was approached before commercial design automation existed. "I can still remember using drafting boards and cut rubylith," says Ted Vucurevich, senior vice president and chief technology officer at Cadence Design Systems Inc. "That was the state of the art in the early 1970s." Many IC designs were quite small, essentially comprising TTL MOS building blocks. The entire design process was done literally by hand and, at least at the Big Three of Fairchild, Motorola, and TI, in a completely vertically integrated and proprietary fashion. Any design automation was homegrown.

//想想在商业设计自动化出现之前，设计是如何进行的。“我仍然记得使用绘图板和切割红宝石玻璃的情景，”Cadence Design Systems Inc.的高级副总裁兼首席技术官Ted Vucurevich说道。“那是20世纪70年代初的技术水平。”许多集成电路（IC）设计规模很小，基本上由TTL MOS（金属氧化物半导体）构建块组成。整个设计过程完全由手工完成，至少在仙童半导体（Fairchild）、摩托罗拉（Motorola）和德州仪器（TI）这三大巨头那里，是以完全垂直整合和专有的方式进行的。任何设计自动化都是自主开发的。

Wally Rhines, CEO of Mentor Graphics Corp. today, remembers those days from his vantage point as head of the group designing consumer products at TI. Rhines recalls, "TI used its proprietary design resources to set up what was, in effect, a 'productization machine.' They realized that the one who would win in TTL was the one who got the most part types out and qualified and sampled the fastest."

To achieve this goal, TI developed a system to quickly design functions, generate masks, characterize the devices, and market them. According to Rhines, that was called the TI Layout and Edit (TILES) system. Schematics were created by hand and simulated in Spice, a relatively new idea itself.

In 1972, the Spice 1 simulator was released into the public domain by the University of California at Berkeley Group, led by Prof. Donald Pederson. It was quickly seized by the semiconductor companies of the day, which each tweaked and customized it to its liking.

"Verification started with Spice and other applications like it," says Raul Camposano, chief technology officer at Synopsys Inc. "They realized that you could simulate electrical circuits to a great degree of accuracy, which would help a lot in constructing them and making sure they would work the first time."

//使用Spice以及类似的仿真软件，可以将电子电路的仿真做到相当高精度的水准！

In those early days, TI and others ran their simulations on the IBM mainframes that had become common on corporate campuses. "At its peak, we kept an entire 3090-600 mainframe running just simulations for semiconductors at one point. It was that big a deal," Rhines says.

//TI和其它公司使用IBM的大型机来运行Spice这样的仿真软件！

Another piece of the automation puzzle from the early 1970s was the emergence of dedicated CAD systems from vendors such as Applicon and Calma for mask production. Automated pattern generation came into vogue as designs grew larger. "People realized you couldn't do these designs by hand anymore, just by drawing them and cutting the rubylith," says Camposano. "It would be much more flexible to have a database in which you could store the patterns. You'd have a digitizing system and to make a change, you could just go into the database and change it."

//在1970年代早期电子自动化的另一个重要拼图，便是CAD系统，用来进行版图生成，用于进行光刻掩模版的生产。

At TI, the capture process largely took place on proprietary systems, but some moved over to the Calma system based on Data General 32-bit minicomputers. These systems had dedicated operators called layout people. Rhines recalls a clear division of labor where engineers performed circuit design and simulation, but the draftsmen did layout.

//精彩。电路涉及人员，电路仿真人员，电路版图布局人员！使用Calma的系统，用于32-bit的微计算机。

Then, technicians would digitize the design from a version drawn on draft paper, using a handheld interface that would enter the coordinates for each of the geometric patterns into the Calma database. Of course, this created significant opportunity for error.

What we now know as physical design verification consisted of taking flatbed plots of the layouts, pinning them on the wall or laying them on a light table, and having people try to find errors. Hence, physical verification was one of the first businesses to be adopted in the emerging custom design space (see "The More Things Change, The More They Stay The Same,").

//现代意义上的物理验证，是传统的定制设计空间中最早采用的业务方法！

By the late '70s and early '80s, the practice of using mainframe computers for engineering began to break down. The Applicon and Calma workstations had arrived on the mask-generation side. Next to seeing a computing change was simulation and verification, with the introduction of Apollo workstations and the VAX and Data General systems. "As the engineers tried to use the IBM mainframe, they found that during the last two weeks of the quarter, they didn't get any work done because the corporate financial people were trying to do the close," Rhines says.

//从IBM大型机，转向使用更加小型化的工作站，包括Calma和Applicon这两家公司都推出了自己的工作站，将自己的软件适配于这些工作站，而不是IBM的大型机。

The rise of a distributed computing model for engineers brought a new breed of commercial design automation. Functional verification at the transistor level with Spice was growing unwieldy and too slow for digital circuits. Hence, logic simulation was born. "The fact that most of the delay was in the devices themselves allowed them to come up with a model for performance and function," Vucurevich says.

//硬件小型化为设计自动化(EDA)的商业发展提供了便利条件。与此同时，使用Spice进行的数字电路功能验证变得非常慢，因此逻辑仿真这一EDA技术发展起来了。

Logic simulation came into prominence with new vendors like Daisy Systems. Specializing in design capture and front-end verification, the company led the way.

//逻辑仿真的代表性公司是Daisy系统公司，专注于设计获取和前端验证！前端验证这个词现在很流行，但设计获取这个词不那么常见，但实际上仍然有很多著作使用“设计获取”或者设计捕获这个词，比如Bill Dally的著作，将编写RTL代码(文本)以及画原理图都归类为设计捕获。

Daisy, along with fellow newcomers Mentor Graphics and Valid, dominated design automation in the early 1980s as full-custom design methodologies took hold. Initially intended for pc-board design, these turnkey systems found applications in IC design as well. Daisy and Valid plied the path of proprietary hardware while Mentor went with Apollo workstations, which ultimately turned out to be the correct choice. The workstation-based systems represented a unification of design capture, simulation, layout, and verification on one platform in one package.

//这一段描写精彩纷呈！Daisy和Mentor Graphics主导了1980年代的【全定制设计方法】。这种方法最初是作为PCB设计的交钥匙方法，但后来也被用于集成电路IC的设计方法学！Daisy走了一个和专用硬件绑定的路线，而Mentor则走了一个使用三方厂商工作站的软硬件解耦的路线，最终证明后者是正确的。这种解耦的软件系统，代表了一种将设计获取、仿真、版图、验证等诸多软件功能集成到一个软件包。

The 1980s turned into the decade of back-end automation. As layout had become onerous with growing circuit complexity, so did the placement of circuit elements and routing of wires. There simply were too many elements to physically place them by hand, making tools essential.

//1980年代也进入到了一个后端自动化的十年。

Companies like Solomon Design Automation, the first tool vendor to bring to market software-only design tools for nonproprietary hardware platforms, started touching on ideas coming out of UC Berkeley regarding common data models. Other early place-and-route tools included Silvar-Lisco, ECAD, and Daisy Systems.

//纯软件的设计工具。布局布线工具。这些都是现代EDA软件以及产业的工具形态了。

Simultaneously, design methodologies began to change. The movement was actually produced by a triangle between the design automation industry, the semiconductor vendors, and designers themselves.

//设计方法学也在变化。这种变化是在三角关系种迭代演进的，包括设计自动化公司，半导体供应商，设计者。

The first aspect of this revolution was the move to cell-based design based on the work of Carver Mead and Lynn Conway in the late 1970s. Earlier methodologies centering on programmable logic arrays had failed to scale adequately and would give way to standard-cell design, launched commercially by VLSI Technology in 1982.

//再次精彩纷呈。第一个革命性的变化是转向基于标准单元的设计(cell-based design)。这是在Mead和Conway工作的基础上！这个Mead和Conway就是上一篇文章【EDA软件破土时刻】所介绍的，是提出【Silicon Compiler】的第一人，可以说是【Silicon Compiler】之父。Mead的学生在其硕士论文种提出的【Silicon Compiler】，而Mead则在他的书本/著作种引用了学生的论文。

For one thing, the higher ab-straction of standard cells provided designers with a way to see more of their design at a given time. It let design be thought of at the gate level, and it spawned the development of standard-cell libraries.

//门级的设计思想。标准单元库的构建。

Gate arrays came shortly after the standard-cell methodology appeared, offering faster fabrication. LSI Logic introduced its first gate-array router in 1982.

//在标准单元方法出现之后不久出现了门阵列Gate Arrays的设计方法，提供了更快的生产制造。1983年LSI逻辑公司生产了第一个门阵列产品。

Also, logic simulation became a popular means of functional verification. With the Apollo workstations of the day gaining more power, tool vendors like Mentor Graphics began shipping gate-level simulators that were fast enough to handle circuits of a reasonably large size.

//逻辑仿真和门级仿真变得足够快，可以支持大规模电路的仿真。

The turning point for the growth of commercial design automation, or computer-aided engineering (CAE) as it was then known, was the advent of the ASIC. Early on, ASIC vendors such as LSI Logic and VLSI Technologies made most of their money selling proprietary tool sets. "The independent, third-party ASIC design flow depended on the major semiconductor companies getting ASIC businesses going and they were slow to do that," Rhines says. Once it began, though, third-party tools became necessary, making the Daisy and Mentor integrated systems big businesses.

//商用设计自动化（当时还叫CAE）的转折点，是ASIC这一概念的到来。最早的ASIC供应商，包括LSI公司和VLSI公司，主要靠出售专用的工具获利。而Daisy和Mentor则依靠集成系统做大业务规模。

ASIC design using standard cell-based methodologies spurred the next major sea change in design automation. In the mid-1980s, digital designs ramped in size until the complexity again became too much.

//ASIC的设计使用基于标准单元的设计方法，这导致了设计自动化的又一个主要变化。

The first part of the paradigm shift was the development of an abstraction level above gate level in the form of hardware description languages (HDLs). There were a number of these vying for acceptance, including what was originally known as very-high-speed IC (VHSIC) HDL, or VHDL. But Verilog, developed at Gateway Design in 1984 along with an event-driven simulator, drew the most attention (see "A Look Back At Verilog").

//最最最关键的一个变化，就是比门级电路更高抽象的HDL语言的出现！这就是后来比较熟悉的VHDL和Verilog了！

Synopsys' introduction of commercial logic synthesis was the second part of the mid-1980s shift. Work on synthesis had taken place at IBM in the early '80s in the form of rule-based systems such as the Logic Synthesis System (LSS).

//最重要的技术就是将HDL语言描述综合为底层结构描述的综合器Synthesis。这个技术在1980年代早期IBM就已经在LSS逻辑综合系统种实现了，而Synopsys推出商用的逻辑综合工具则是在1980年代中期，代表了关键转变的第二部分！！

Early synthesis tools, such as the first versions of Design Compiler in 1986, were focused on optimization. The tool helped designers meet timing constraints while minimizing area (see "Technology X: The 'What-If' Proposition").

//最早的综合工具，比如Design Compiler，主要聚焦于优化，包括在时序约束和面积约束的情况下的优化。

The biggest driver behind logic synthesis was the move up in abstraction from gate-level design to register-transfer level (RTL). Moving up to RTL design, and then synthesizing RTL back down to gate level, didn't change the fabric of design, which even now remains predominantly standard-cell-based. "Moving up to RTL was mostly a tool thing to master complexity," says Camposano. "That's when we really started using HDLs to design chips more or less the way you write programs. You'd write it and compile all the way down to automatically placed and routed circuits."

//再次精彩纷呈。逻辑综合的最大的推动力，就是将数字芯片的设计抽象层级从gate-level转变为RT-Level。转变为RTL设计以后，再向下综合为门级电路描述，不改变芯片的生产制造（不像此前的gate-array主要是改变生产制造过程），而是彻底改变了芯片的设计方法学！这一方法一致保持到现在，仍然是基于standard-cell的主导方法，而不是gate-array的设计方法。可以说gate-array的设计方法已经翻篇过去了。

Logic synthesis represented a much more optimal way to translate and transform an abstract description of a circuit to a gate-level schematic than previous methods. That profoundly impacted the design process, notes Cadence's Vucurevich. For some time by the late 1980s, there had been the notion of the "tall, skinny designer," or a designer who had the insight and skills to take a project from conception all the way through realization. The design methodology brought to fruition in the ASIC age of logic synthesis re-established the division of labor between the front and back ends of the design process.

//逻辑综合是跨时代的关键。在ASIC逻辑综合时代得以实现的设计方法论，重新确立了设计流程前端与后端之间的分工。

But synthesis advocates saw in the methodology potential to join these realms again through behavioral synthesis. This approach would start from a level above RTL, which is to say a purely behavioral description of the system, and go all the way down to gates. The idea harks back to Carver Mead's concept of silicon compilers. These were worked on for a time in the mid-1980s but ultimately abandoned as a less efficient, and less broadly applicable, alternative to synthesis.

//精彩纷呈！综合技术的倡导者们看到了通过行为综合再次将这些领域结合起来的潜力。这种方法将从高于寄存器传输级（RTL）的层面开始，即从系统的纯行为描述入手，一直深入到门级。这一理念可以追溯到卡弗·米德（Carver Mead）的硅编译器概念。在20世纪80年代中期，硅编译器曾被研究了一段时间，但最终被放弃，因为它是一种效率较低、适用范围较窄的综合替代方案。说白了，所谓行为综合，更高级的抽象，只是一种过度设计。不过，Chisel相对于RTL算是过度设计吗？不见得。这篇文章是2002年写的，那时候还没有见到Chisel。但从实际效果来看，Chisel是有潜力作为传统VHDL/Verilog的更高层抽象替代或补充的。

Broad acceptance of synthesis brought with it an expanded design automation industry in the form of a raft of "point tools," or tools for specific verification and analysis tasks throughout the design flow. Throughout the '90s, the synthesis-based front-end flows were refined and improved to keep up with Moore's Law.

//基于逻辑综合的前端设计流程！设计自动化产业的扩展。

Today's engineers are on the verge of yet another sea change in the EDA landscape. A hallmark of the design automation evolution has been that it began at the lowest possible levels of abstraction, or the physical domain. The masking process saw design automation first. "That's because the most complex parts are the closest to the mask, which is where you have the most objects," says Synopsys' Camposano. It was far easier to create a database of polygons and print them on a plotter than to draw them by hand.

//当今的工程师们正处在电子设计自动化（EDA）领域又一次巨变的边缘。设计自动化演进的一个显著特征是，它从尽可能低的抽象层次，即物理领域开始。掩模工艺首先见证了设计自动化。“这是因为最复杂的部分最接近掩模，而掩模上包含最多的对象，”。创建一个反映芯片版图的数据库并在绘图仪上打印出来，要比手工绘制容易得多。这是物理设计自动化的最关键部分--物理综合或者称为后端综合。

Place and route fell next because it was the next level up in terms of the number of objects to be handled. Then, once standard-cell methodologies were developed, logical design was the next target.

//标准单元设计方法。逻辑设计。布局布线。

If we follow the thread, behavioral methodologies are the next obvious stage in automation. A new level of abstraction, higher than RTL, will allow system-level designers to specify the function they want, then have a wide range of implementation options. One initiative to watch in this area is the Metropolis initiative of the Gigascale Silicon Research Center, which strives to create a metamodel for functionality based on abstract algebra that assumes no form of implementation.

//如果我们沿着这条思路继续探讨，那么行为方法论将是自动化下一个显而易见的阶段。一种比寄存器传输级（RTL）更高的抽象层次，将使系统级设计人员能够明确他们想要的功能，然后拥有广泛的实现选项。在这一领域值得关注的一项举措是千兆级硅研究中心的Metropolis计划，该计划致力于基于抽象代数创建一个功能元模型，该模型不假设任何实现形式。不过站在2025年的节点上来看，Chisel是更接近的一条道路。

Meanwhile, today's cell-based ASIC-style design methodologies push forward into the system-on-a-chip (SoC) age. The clean handoff between the domains of logical and physical design that has been the dominant paradigm of the ASIC age is no longer so clean in the era of SoCs and ultra-deep-submicron (UDSM) silicon fabrication. In fact, it's collapsing quickly as the dominance of interconnect in delay calculations grows. Front-end designers can no longer "throw their designs over the wall" to designers who specialize in physical implementation without knowledge of how their work is expressed in silicon.

//片上系统(SoC)和超深亚微米(UDSM)硅片制造时代。前端设计师再也不能将他们的设计“扔给”那些专门负责物理实现的设计师，而无需了解他们的工作是如何在硅片上表达的。

Thus, a new era has begun in design tools that merges the logical and physical (see this issue's cover story, p. 45). Going forward, there will be much more emphasis on signal integrity and analysis of physical effects at UDSM geometries. All of these issues are ways in which EDA tools will aid designers in conquering the complexity that's to come as silicon fabrication continues to keep pace with Gordon Moore's Law, 37 years old but still holding true.

//摩尔定律1965年提出，到2022年时37年。

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文章摘要： 本文回顾了电子设计自动化(EDA)行业从1970年代至今的发展历程。早期设计完全依赖手工绘制，随后CAD系统开始用于掩模生成。1980年代见证了逻辑仿真工具的出现和全定制设计方法的兴起，Daisy与Mentor公司主导了这一变革。关键转折点是ASIC概念的出现和HDL语言的引入，特别是Verilog和VHDL的应用。1980年代中期，Synopsys推出的逻辑综合工具实现了从RTL到门级的自动转换，彻底改变了设计流程。随着工艺进步，EDA工具不断应对复杂度挑战，从物理设计扩展到逻辑设计，并正在向更高抽象层次的行为级设计演进。当前SoC和超深亚微米时代要求逻辑与物理设计的深度融合，EDA工具将继续帮助设计师应对未来更复杂的芯片设计挑战。